Microsoft Confirms Some Surface Pro 6, Surface Book 2s Are Running at Pentium II Speeds


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If you own a Surface Pro 6 or Surface Book 2 and you’ve noticed slower-than-expected performance lately, we’ve got good news: You aren’t imagining it. We’ve also got bad news: Currently, there is no fix, though Microsoft is reportedly working on one. There have been reports on Reddit from users who saw their CPU speeds falling to as low as 400MHz, even on systems plugged into the wall. What makes this issue a little curious, however, is that some of these reports go back for several years.

TechRepublic contacted Microsoft, who said: “We are aware of some customers reporting a scenario with their Surface Books where CPU speeds are slowed,” a Microsoft spokesperson told TechRepublic. “We are quickly working to address via a firmware update.”

While this quote doesn’t reference the issue with Surface Pro, some of the Reddit threads focus on that platform rather than the Surface Book or Surface Book 2.SEEAMAZON_ET_135 See Amazon ET commerce In this case, however, it appears that the issue has been flying along under the radar for a while — long enough that people have found their own fix. There’s a third-party utility called ThrottleStop. It can be used to disable a specific CPU instruction called BD PROCHOT.

What’s a BD PROCHOT?

BD PROCHOT stands for “Bidirectional processor hot.” ‘Bidirectional’ refers to the fact that this signal can be thrown by the CPU itself (to lower its own temperature) or by another component as a means of protecting that part from overheating. Imagine, for example, that your GPU was going to overheat and damage itself due to high operating temperature. The GPU can throw this flag to reduce the CPU’s frequency, reducing the processing work that was causing an overheat in the first place.

ThrottleStop

It is not clear exactly which components can use the BD PROCHOT function. It was introduced at a time when individual components paid less attention to their own thermal conditions and performed less clock throttling overall, though that intelligence has been baked into mobile hardware at various times and in various ways. Some modern systems measure skin temperature and use it as part of determining their operating frequencies, for example.

Because BD PROCHOT is bidirectional, there’s a potential risk here. The flag can be thrown by a different component that isn’t the CPU, which means (in theory), you’re overriding a component that’s trying to preserve its own functionality by telling the CPU to slow down. But this does not seem to be an explanation for what’s going on with Surface devices. Customers report these problems on products that show no signs of any overheat, and some customers who have used the ThrottleStop utility to turn the BD PROCHOT function off have gone on to use their products for a year or more without any problems.

There are non-Surface users who have reported BD PROCHOT issues as well over the years, so this isn’t a Microsoft-specific instruction or capability, though the issue does seem to be hitting Surface in particular right now. Users who need to use ThrottleStop to restore normal functionality can probably attempt doing so. If you do, be cautious. Don’t disable BD PROCHOT and then run the ugliest thermal workload you can find — turn the flag off and let the system sit at idle or run a YouTube video. See if you notice any inappropriate behavior or hot spot formation on the device. If you run into problems, you can use the utility again to restore default functionality.

Devices like the Surface Book and Surface Pro 6 are thin, which means any significant source of inappropriate heat is likely to migrate to the surface (no pun intended) of the device. So before you disable BD PROCHOT, if you’re concerned about the impact, take a moment to familiarize yourself with how hot your Surface Book or Surface Pro 6 feels to the touch now. Then disable BD PROCHOT and run the same check after giving the system time to warm up. If the machine stays stable and you have no other problems, you’re probably fine to use it. Just keep an eye out for a fix from Microsoft.

If your machine feels hotter to the touch than it ought to, or the heat is building up in an unusual spot for your machine, we advise against disabling PROCHOT until more information is available. People reporting this issue seem to be experiencing a bug rather than a genuine problem but that is not a guarantee. If you experience any instabilities or thermal issues after disabling BD PROCHOT via third-party utility, re-enable it immediately and contact Microsoft for additional service instructions.

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Google and Twitter are using AMD’s new EPYC Rome processors in their datacenters – gpgmail


AMD announced that Google and Twitter are among the companies now using EPYC Rome processors during a launch event for the 7nm chips today. The release of EPYC Rome marks a major step in AMD’s processor war with Intel, which said last month that its own 7nm chips, Ice Lake, won’t be available until 2021 (though it is expected to release its 10nm node this year).

Intel is still the biggest datacenter processor maker by far, however, and also counts Google and Twitter among its customers. But AMD’s latest releases and its strategy of undercutting competitors with lower pricing have quickly transformed it into a formidable rival.

Google has used other AMD chips before, including in its “Millionth Server,” built in 2008, and says it is now the first company to use second-generation EPYC chips in its datacenters. Later this year, Google will also make virtual machines that run on the chips available to Google Cloud customers.

In a press statement, Bart Sano, Google vice president of engineering, said “AMD 2nd Gen Epyc processors will help us continue to do what we do best in our datacenters: innovate. Its scalable compute, memory and I/O performance will expand out ability to drive innovation forward in our infrastructure and will give Google Cloud customers the flexibility to choose the best VM for their workloads.”

Twitter plans to begin using EPYC Rome in its datacenter infrastructure later this year. Its senior director of engineering, Jennifer Fraser, said the chips will reduce the energy consumption of its datacenters. “Using the AMD EPYC 7702 processor, we can scale out our compute clusters with more cores in less space using less power, which translates to 25% lower [total cost of ownership] for Twitter.”

In a comparison test between 2-socket Intel Xeon 6242 and AMD EPYC 7702P processors, AMD claimed that its chips were able to reduce total cost of ownership by up to 50% across “numerous workloads.” AMD EPYC Rome’s flagship is the 64-core, 128-thread 7742 chip, with a 2.25 base frequency, 225 default TDP and 256MB of total cache, starts at $6,950.


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How Are Process Nodes Defined?


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We talk a lot about process nodes at ExtremeTech, but we don’t often refer back to what a process node technically is. With Intel’s 10nm node moving towards production, I’ve noticed an uptick in conversations around this issue and confusion about whether TSMC and Samsung possess a manufacturing advantage over Intel (and, if they do, how large an advantage they possess).

Process nodes are typically named with a number followed by the abbreviation for nanometer: 32nm, 22nm, 14nm, etc. There is no fixed, objective relationship between any feature of the CPUSEEAMAZON_ET_135 See Amazon ET commerce and the name of the node. This was not always the case. From roughly the 1960s through the end of the 1990s, nodes were named based on their gate lengths. This chart from IEEE shows the relationship:

lithot1

For a long time, gate length (the length of the transistor gate) and half-pitch (half the distance between two identical features on a chip) matched the process node name, but the last time this was true was 1997. The half-pitch continued to match the node name for several generations but is no longer related to it in any practical sense. In fact, it’s been a very long time since our geometric scaling of processor nodes actually matched with what the curve would look like if we’d been able to continue actually shrinking feature sizes.

2010-ITRS-Summary

Well below 1nm before 2015? Pleasant fantasy.

If we’d hit the geometric scaling requirements to keep node names and actual feature sizes synchronized, we’d have plunged below 1nm manufacturing six years ago. The numbers that we use to signify each new node are just numbers that companies pick. Back in 2010, the ITRS (more on them in a moment) referred to the technology chum bucket dumped in at every node as enabling “equivalent scaling.” As we approach the end of the nanometer scale, companies may begin referring to angstroms instead of nanometers, or we may simply start using decimal points. When I started work in this industry it was much more common to see journalists refer to process nodes in microns instead of nanometers — 0.18-micron or 0.13-micron, for example, instead of 180nm or 130nm.

How the Market Fragmented

Semiconductor manufacturing involves tremendous capital expenditure and a great deal of long-term research. The average length of time between when a new technological approach is introduced in a paper and when it hits widescale commercial manufacturing is on the order of 10-15 years. Decades ago, the semiconductor industry recognized that it would be to everyone’s advantage if a general roadmap existed for node introductions and the feature sizes those nodes would target. This would allow for the broad, simultaneous development of all the pieces of the puzzle required to bring a new node to market. For many years, the ITRS — the International Technology Roadmap for Semiconductors — published a general roadmap for the industry. These roadmaps stretched over 15 years and set general targets for the semiconductor market.

SemiconductorRoadmap

Image by Wikipedia

The ITRS was published from 1998-2015. From 2013-2014, the ITRS reorganized into the ITRS 2.0, but soon recognized that the scope of its mandate — namely, to provide “the main reference into the future for university, consortia, and industry researchers to stimulate innovation in various areas of technology” required the organization to drastically expand its reach and coverage. The ITRS was retired and a new organization was formed called IRDS — International Roadmap for Devices and Systems — with a much larger mandate, covering a wider set of technologies.

This shift in scope and focus mirrors what’s been happening across the foundry industry. The reason we stopped tying gate length or half-pitch to node size is that they either stopped scaling or began scaling much more slowly. As an alternative, companies have integrated various new technologies and manufacturing approaches to allow for continued node scaling. At 40/45nm, companies like GF and TSMC introduced immersion lithography. Double-patterning was introduced at 32nm. Gate-last manufacturing was a feature of 28nm. FinFETs were introduced by Intel at 22nm and the rest of the industry at the 14/16nm node.

Companies sometimes introduce features and capabilities at different times. AMD and TSMC introduced immersion lithography at 40/45nm, but Intel waited until 32nm to use that technique, opting to roll out double-patterning first. GlobalFoundries and TSMC began using double-patterning more at 32/28nm. TSMC used gate-last construction at 28nm, while Samsung and GF used gate-first technology. But as progress has gotten slower, we’ve seen companies lean more heavily on marketing, with a greater array of defined “nodes.” Instead of waterfalling over a fairly large numerical space (90, 65, 45) companies like Samsung are launching nodes that are right on top of each other, numerically speaking:

I think you can argue that this product strategy isn’t very clear, because there’s no way to tell which process nodes are evolved variants of earlier nodes unless you have the chart handy. But a lot of the explosion in node names is basically marketing.

Why Do People Claim Intel 7nm and TSMC/Samsung 10nm Are Equivalent?

While node names are not tied to any specific feature size, and some features have stopped scaling, semiconductor manufacturers are still finding ways to improve on key metrics. The chart below is drawn from WikiChip, but it combines the known feature sizes for Intel’s 10nm node with the known feature sizes for TSMC’s and Samsung’s 7nm node. As you can see, they’re very similar:

Intel-10-Foundry-7

Image by ET, compiled from data at WikiChip

The delta 14nm / delta 10nm column shows how much each company scaled a particular feature down from its previous node. Intel and Samsung have a tighter minimum metal pitch than TSMC does, but TSMC’s high-density SRAM cells are smaller than Intel’s, likely reflecting the needs of different customers at the Taiwanese foundry. Samsung’s cells, meanwhile, are even smaller than TSMC’s. Overall, however, Intel’s 10nm process hits many of the key metrics as what both TSMC and Samsung are calling 7nm.

Individual chips may still have features that depart from these sizes due to particular design goals. The information manufacturers provide on these numbers are for a typical expected implementation on a given node, not necessarily an exact match for any specific chip.

There have been questions about how closely Intel’s 10nm+ process (used for Ice Lake) reflects these figures (which I believe were published for Cannon Lake). It’s true that the expect specifications for Intel’s 10nm node may have changed slightly, but 14nm+ was an adjustment from 14nm as well. Intel has stated that it is still targeting a 2.7x scaling factor for 10nm relative to 14nm, so we’ll hold off on any speculation about how 10nm+ may be slightly different.

Pulling It All Together

The best way to understand the meaning of a new process node is to think of it as an umbrella term. When a foundry talks about rolling out a new process node, what they are saying boils down to this:

“We have created a new manufacturing process with smaller features and tighter tolerances. In order to achieve this goal, we have integrated new manufacturing technologies. We refer to this set of new manufacturing technologies as a process node because we want an umbrella term that allows us to capture the idea of progress and improved capability.”

Any additional questions on the topic? Drop them below and I’ll answer them.

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